Physically Unclonable Functions (PUFs) extract secret keys from intrinsic hardware, offering strong resistance to cloning and physical tampering. SRAM PUFs reuse memory at start-up but are sensitive to environmental noise. We present a two-stage scheme to extract reliable cryptographic keys from SRAM PUFs. The scheme extends our prior single-stage TMVS approach to reduce memory overhead while maintaining reliability. The method first extracts intermediate reliable bits from raw SRAM responses, then reapplies TMVS to achieve the target key error probability 10−6 with 128-bit keys. The two-stage cascade maintains all the benefits of the original design (low-complexity majority voting decoder, single SRAM measurement, low entropy loss) while reducing the SRAM memory overhead by 3.5x for 7.5% raw bit error rates. Our analysis reveals new error-memory trade-offs, demonstrating that the TS-TMVS maintains practical computational and memory requirements for resource-constrained devices.